Automated Synthesis of Analog Standard Cells Using Mixed Signal Processing

While digital-only hardware software co-design is an established, although unsolved and currently researched, discipline, it is difficult to replicate these methods in the analog domain. Although digital processing research is widely used in the modern world, the computation is sufficiently costly in terms of computational energy and power efficiency to limit its portability. Current research is exploring the opportunities in the analog domain, particularly programmable and configurable analog domain. This research uses a Field Programmable Analog Array (FPAA), which has significant advantages over its digital counterpart, the Field Programmable Gate Array (FPGA), in terms of power consumption, parameter density, and data flow handling. Working with the FPAA yields an efficiency of nearly 1000 times greater than that of digital systems. The switching of thousands of transistors in the digital domain is replaced by only a few in analog, regulated by a power rail between two voltages. The FPAA is programmed using an open-source tool set that converts block designs into switch lists for compilation. FPAA devices demonstrate many diverse signal processing applications and enables r the ongoing body of research in analog computation. This project aims to explore these capabilities through cells customized to perform such functions on the FPAA board in order to develop a set of standard analog cells. To create new analog standard cells, such as in a 350nm CMOS process, current abstraction of programmable analog circuits enables formulating a manageable number of analog cells. In order to ultimately create new analog standard cells, existing standard analog cells need to be understood on a schematic basis. Starting with a standard 350nm Integrated Circuit (IC) process, the programmable analog library requires the constraint of having a standard pitch for the analog cells. This standard cell library will be fabricated and tested, further illustrating the potential place and route capabilities of a mixed structure of analog and digital components.